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(parent: 3c5da14) | patch
x86 hvm: Emulate MSR_IA32_TSC_DEADLINE
authorKeir Fraser <keir@xen.org>
Wed, 15 Dec 2010 11:01:59 +0000 (11:01 +0000)
committerKeir Fraser <keir@xen.org>
Wed, 15 Dec 2010 11:01:59 +0000 (11:01 +0000)
commit464242cd16463dde8745450e9b199cb3dc6e6a06
treed12e7e352bd7eeeee3f58508cd43c74b2af56a83tree | snapshot
parent3c5da143be896254ef8e86e2a0e45dae6322b3d0commit | diff
x86 hvm: Emulate MSR_IA32_TSC_DEADLINE

Accesses to MSR_IA32_TSC_DEADLINE are trapped, with value stored in a
new field vlapic->hw.tdt_msr. vlapic->pt is reused in one shot mode
for vtdt to trigger expire events.

For details, please refer to the Intel Architectures Software
Developer's Manual 3A, 10.5.4.1 TSC-Deadline Mode.

Signed-off-by: Wei Gang <gang.wei@intel.com>
xen/arch/x86/hvm/hvm.c diff | blob | history
xen/arch/x86/hvm/vlapic.c diff | blob | history
xen/include/asm-x86/hvm/vlapic.h diff | blob | history
xen/include/public/arch-x86/hvm/save.h diff | blob | history
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